SilMinds

Publications

Decimal Floating Point for future processors” 2010, International Conference on Microelectronics (ICM)

Three engines to solve verification constraints of decimal Floating-Point operation” 2010, 44th Asilomar Conference on Signals, Systems and Computers

Algorithm and architecture for on-line decimal powering computation” 2010, 44th Asilomar Conference on Signals, Systems and Computers

A decimal floating-point fused-multiply-add unit” 2010,  53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

Energy and Delay Improvement via Decimal Floating Point Units” 2009,  19th IEEE Symposium on Computer Arithmetic (ARITH 2009)

A decimal fully parallel and pipelined floating point multiplier” 2008,  42nd Asilomar Conference on Signals, Systems and Computers