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SilMinds has developed a complete family of IP cores implementing the algebric decimal floating point arithmetic functions. DFPA IP Cores family solved all the problems associated with traditional solutions. It cuts down the delay with 2 to 3 orders of magnitude compared to software solutions. It is fully compliant with IEEE 754-2008 standard which ensures full accuracy and precision. Most of the cores are supporting both decimal64 (16 digits) and decimal128 (34 digits) formats. All the cores are using the IEEE 754-2008 Decimal Interchange format encoding.
Many of the cores are available in two versions: High Performance (for high performance driven applications) and Low Cost (for low cost – general purpose applications).
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SilMinds sole purpose is to provide the customers with the best possible design services and to develop the highest quality products for the customers.
In harmony with this service model, we have brought together industry experts in arithmetic solutions involved DSP, arithmetic co-processors, microcontrollers, bus interfaces and other arithmetic components.
Design solutions offered including System Architecture, HDL designs targeted FPGA and ASIC ,logic synthesis ,functional and timing verification.
SilMinds can handle projects starting from an idea till synthesis and timing verfications. SilMinds team includes a P.hD from Stanford University, M.Sc.'s.
SilMinds offers very attractive business models that can shaped according to the customer requirements. |
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