SilMinds

NRDecSqrt64/128

NRDecSqrt64 and NRDecSqrt128 IP core units are DFP Square Root designs, offered in 64-bit and 128-bit versions. The unit computes the square root of a vector Operand. Inputs are encoded in Decimal Interchange Format.

The square root unit is based on the Newton-Raphson iterativeĀ  method. It computes the final result in 2 iterations for the 64-bit version and in 3 iterations for the 128-bit version. The product is fully compliant with the IEEE 754-2008 Standard.

Download the NRDecSqrt64/128 Data Sheet

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